Recall-driven Precision Refinement: Unveiling Accurate Fall Detection using LSTM

This paper presents an innovative approach to address the pressing concern of fall incidents among the elderly by developing an accurate fall detection system. Our proposed system combines state-of-the-art technologies, including accelerometer and gyroscope sensors, with deep learning models, specifically Long Short-Term Memory (LSTM) networks. Real-time execution capabilities are achieved through the integration of Raspberry Pi hardware. We introduce pruning techniques that strategically fine-tune the LSTM model's architecture and parameters to optimize the system's performance. We prioritize recall over precision, aiming to accurately identify falls and minimize false negatives for timely intervention. Extensive experimentation and meticulous evaluation demonstrate remarkable performance metrics, emphasizing a high recall rate while maintaining a specificity of 96\%. Our research culminates in a state-of-the-art fall detection system that promptly sends notifications, ensuring vulnerable individuals receive timely assistance and improve their overall well-being. Applying LSTM models and incorporating pruning techniques represent a significant advancement in fall detection technology, offering an effective and reliable fall prevention and intervention solution.Comment: 8 pages, 9 figures, 6th IFIP IoT 2023 Conferenc

Correlating Fatality Rate to Road Accidents in India: A Case Study using Big Data

Number of vehicles on Indian roads is increasing at a very high rate every year and the number of road accidents is rising at a similar rate. In 2016, around half a million (reported) people were injured in India due to different types of road accidents and out of them, around 150,000 people were killed. This leads to a very serious concern that there are some major flaws in emergency rescue services in the country. Big Data analysis and different statistical models can identify accident frequencies and patterns in a region, which may be useful to identify accident-prone regions in the country. A centralized database of all possible rescue authorities with their exact location and contact information can be a very important part of a smart accident reporting system and rescue operations. In this paper, we have studied the number of injuries in road accidents and deaths in most of the Indian states and proposed a model correlating them with the number of hospitals and police stations available in those states. This model will help not only to figure out critical accident-prone states in India but also to create a database for an emergency rescue system. The data used for this model has been generated using Google Radar Search and Reverse Geocoding API that can be very much useful to accelerate development f emergency rescue operations needed for Indian road systems and can be replicated easily for other countries

Minimum Congestion Placement for Y-interconnects: SOme studies and observations

Abstract — Y-interconnects for VLSI chips are based on the use of global and semi-global wiring in only 0 ◦ , 60 ◦ , and 120 ◦. Though X-interconnects are fast replacing the traditional Manhattan (M) interconnects, the very recently proposed Y-interconnects have been observed to possess certain key advantages. Y-interconnects tend to consume less routing resources than M-interconnects. Unlike the X-interconnect architectures, Y-interconnect architectures support regular routing grid. This is indeed very important for simplifying manufacturing processes and applying the routing and design rule checking algorithms. Several efficient Y-routing algorithms have been proposed in literature. However, to the best of our knowledge, not much have been reported so far in designing algorithms for Y-interconnectbased VLSI module placement and its effects on the congestion or wire-lengths. In this paper, in an attempt to fill the gap in the existing literature, we propose a novel simulated-annealing-based placement technique for mixed-sized cells which tries to reduce the congestion for Y-interconnects. The proposed method attempts to reduce the congestion, and observes the corresponding changes in the estimated lengths of the Y-interconnects. It has been implemented in Linux environment and experiments performed with randomly generated instances, and some well-known benchmarks. The wirelength estimates for the Y-interconnects, and Manhattan interconnects for the same placement instances are compared. Results obtained are quite encouraging. The experimental results for a specific number of iterations and cooling schedule show improvements in congestion in most of the cases. I

Adaptive Task Allocation and Scheduling on NoC based Multicore Platforms with Multitasking Processors

International audienceThe application workloads in the modern multicore platform are becoming increasingly dynamic. It becomes challenging when multiple applications need to be executed in parallel in such systems. Mapping and scheduling of these applications are critical for system performance, and energy consumption, especially in Network-on- Chip (NoC) based multicore systems. These systems with multitasking processors offer a better opportunity for parallel application execution. Mapping solutions generated at design-time may be inappropriate for dynamic workloads. To improve the utilization of the underlying multicore platform and cope with the dynamism of application workload, often, task allocation is carried out dynamically. This paper presents a hybrid task allocation and scheduling strategy which exploits the design-time results at run-time. By considering the multitasking capability of the processors, communication energy and timing characteristics of the tasks, different allocation options are obtained at design-time. During run-time, based on the availability of the platform resources and application requirements, the design-time allocations are adapted for mapping and scheduling of tasks which result in improved run-time performance. Experimental results demonstrate that the proposed approach achieves, on an average 11.5%, 22.3%, 28.6% and 34.6% reduction in communication energy consumption as compared to CAM [18], DEAMS [4], TSMM [35] and CPNN [30], respectively for NoC based multicore platforms with multitasking processors. Also, the deadline satisfaction of the tasks of allocated applications improves on an average by 32.8% when compared with the state-of-the-art dynamic resource allocation approaches

A Hybrid Adaptive Strategy for Task Allocation and Scheduling for Multi-applications on NoC-based Multicore Systems with Resource Sharing

International audienceAllocation and scheduling of applications affect the timing response and system performance, particularly for Network-on-Chip (NoC) based multicore systems executing realtime applications. These systems with multitasking processors provide improved opportunity for parallel application execution. In dynamic scenarios, runtime task allocation improves the system resource utilization and adapts to varying application workload. In this work, we present an efficient hybrid strategy for unified allocation and scheduling of tasks at runtime. By considering multitasking capability of processors, communication cost and task timing characteristics, potential allocation solutions are obtained at design-time. These are adapted for dynamic mapping and scheduling of computation and communication workloads of real-time applications. Simulation results show that the proposed approach achieves 34.2% and 26% average reduction in network latency and communication cost of the allocated applications. Also, the deadline satisfaction of the tasks improves on average by 42.1% while reducing the allocation-time overhead by 32% when compared with existing techniques